Get Started with High-Speed Digital

Upon completion, you should be familiar with

• How to start with ADS & understand the basics, covering workspaces, libraries, cells and technologies
• How to use layout in ADS & perform some basics operations How to deal with pre-layout phase for SI/HSD designers in ADS
• How to use Channel simulator with IBIS-AMI models How to setup simulations with SIPro and PiPro (Post-Layout Analysis)
• How to tune the HSD design to simulate the behavior of real-world PCB imported into ADS

ADS Circuit Simulation

• Workspaces, libraries, cells, views
• Component palettes, simulation controllers, data display
• Transient Analysis

Connectivity Design and Layout Basics

• Working with design kits, path/trace routing and editing
• Snap modes, shapes vs components, placement and editing, technology files

Pre-Layout Analysis

• Controlled Impedance Line Designer, Via Designer, Transmission Line Libraries

Channel Simulation

• Channel Simulation using IBIS-AMI Model, Mix and Match Simulations, NRZ and PAM-X Signal.

SIPro

• Import / export, connectivity modes, Net names
• Learn SIPro and PIPro flow
• Power-aware signal integrity analysis

PIPro

• PIPro DC IR drop analysis
• PDN AC Impedance analysis

Electrothermal

• Heat dissipation in PCB’s, temperature profiles.

ADS Circuit Simulation

• Lab: Simulate circuit and display data, create ten-stage LC ladder network using a subcircuit, add losses to the LC transmission line model, simulate a distributed microstrip line.
• Lab: Setup transient simulation, compare Dispersive (Non-TEM) to Non-Dispersive (TEM) transmission lines, discontinuities in signal interconnects.

Connectivity Design and Layout Basics

• Lab: Standard ADS layer definition, basic layout manipulation, creating custom layers, basic routing and editing Interconnects, non-orthogonal Interconnects.

Pre-Layout Analysis

• Lab: Design a differential pair on different layer with CILD & design differential vias with via designer tool.

Channel Simulation

• Lab: Build a channel, channel simulation of backdrilled vias, comparison of backdrilled vias with non backdrilled vias (through vias), optimize the channel performance, channel simulation with IBIS-AMI model, mix and match simulation, PAM4 signal channel simulation.

SIPro

• Lab: Import ODB++ layout with technology, investigate the imported layout, Net-based connectivity mode
• Lab: Inspect SIPro/PIPro window elements, setup an SI analysis of a signal interconnect, run SIPro simulation of an interconnect and inspect results, Net identification and layer visibility.
• Lab: You will simulate eye diagram for a FPGA memory line that goes from IC socket to a DDR4 chip where both FPGA and DDR4 chips are modelled using IBIS files. Setup power-aware SIPro analysis of the interconnection and associated PDN. Study the difference between ideal connections between VRM, FPGA and memory IC and power-aware interconnect model where PDN fluctuations due to data line dynamic behaviour are included.

PIPro

• Lab: Analyse the voltage drop from VRM to memory IC to make sure the DC voltage seen at the chip inputs is sufficiently large for stable operation.
• Lab: Convert the DC IP drop analysis to a PIPro AC Impedance analysis of the PDN. Associate component simulation models to the imported instances to be able to look at the impedance profiles from the chip to the VRM considering the decoupling capacitors. Performing decap optimizations.

Electrothermal

• Lab: Setup a thermal analysis of a PCB and then ET analysis.

Designers interested in understanding how to design pre-layout with ADS, to use Channel Simulation, IBIS-AMI models, to import board from other PCB tools and to analyze in ADS in post-layout phase with electromagnetic models (EM model). This training class is designed primarily for SI/PI/HSD engineers having some experience in Advanced Design System.