Controlled Impedance Line Designer, Via Designer, Transmission Line Libraries

Course 3 of 8 in Get Started with High-Speed Digital

Learn to model complex interconnects—transmission lines and vias—and combine them into cohesive schematics for signal integrity and EM simulation

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Curriculum3 hr 47 min

  • Content
  • Pre-Layout Design Flow 0 hr 2 min
  • Transmission Line Libraries 0 hr 2 min
  • Controlled Impedance Line Designer 0 hr 14 min
  • Via Designer 0 hr 18 min
  • Build Channel Models 0 hr 2 min
  • SnP Component 0 hr 4 min
  • Lab 1: CILD and Via Designer 3 hr 0 min
  • Knowledge Check 0 hr 5 min

About this course

Curriculum3 hr 47 min

  • Content
  • Pre-Layout Design Flow 0 hr 2 min
  • Transmission Line Libraries 0 hr 2 min
  • Controlled Impedance Line Designer 0 hr 14 min
  • Via Designer 0 hr 18 min
  • Build Channel Models 0 hr 2 min
  • SnP Component 0 hr 4 min
  • Lab 1: CILD and Via Designer 3 hr 0 min
  • Knowledge Check 0 hr 5 min

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